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Hardware and Software Co-design: An Architecture Proposal for a Network-on-Chip Switch based on Bufferless Data Flow
S. Ortega-Cisneros1, H.J. Cabrera-Villaseñor1, J.J. Raygoza-Panduro2, F. Sandoval1, R. Loo-Yau1
1 Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional Unidad Guadalajara Guadalajara, Jalisco, México
2 Centro Universitario de Ciencias Exactas e Ingenierías Universidad de Guadalajara Guadalajara, Jalisco, México
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ISSN: 16656423
Original language: English
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